What Can Software Developers Learn From Hardware Designers?
By swdeveloper on Jun 27, 2006
Conventionally software development methodology and tools lead the hardware design counterparts. Many hardware designers look for the solution or new tool ideas from the software design territory. For example when the chip transistor count increases, the hardware designers can no longer afford designing and simulating their designs at transistor or gate abstraction level. The hardware people took many language constructs from C/C++ programing and introduced Verilog for RT and Behavioral level design representations. With the increasing computing concurrency and horizontal scalability in latest software development, it may be time for software developers to learn something from the existing hardware design domain. When an engineer faces the concurrent threads or logic devices, one big challenge is to avoid race condition problems. In hardware logic simulation, one main functionality is to assign unknown logic value to a logic node when logic contention occurs at the node. In multi-threaded programming, a shared memory location may suffer logic contention when one thread write a data different from the data read or written by another thread at the memory location. Data race detection tool in the upcoming Sun Studio express release will perform run-time checking to detect a potential data race condition problem in a OpenMP or MT program. Hardware designers also apply static timing analyzer, logic checker and formal proof to detect the critical timing and design logic faults statically. LockLint from Sun Studio is a similar static checking tool in software developer tool space. However there can be more powerful static software developer tools to detect race condition, parallel scalability bottleneck and distributed computing communication issues. No doubt the static software tools will be more complex than the hardware tools. For example, Binary Decision Diagram (BDD) is an important infrastructure to represent the hardware circuitry efficiently for formal verification. This kind of efficient logic representation cannot be done for software programs. Furthermore it is extremely hard to do sufficient data dependency analysis for a C/C++ program with pointers and template. However some software researchers begin to learn from the hardware design formal verification techniques to design new software tools. Debugging is a big challenge for distributed computing software which ranges from MPI applications to SOA world. A traditional software debugging tool become inadequate in dealing with the many concurrent processes interacting among one another. It is very hard to setup a software environment to halt and control many concurrent processes and also have transparency to look into the process states. Design For Testability DFT methodology and the related tools have a long history in hardware design world. It will not be surprising to me that software developer community embrace DFT to meet the debugging need of distributed computing software in the near future.