For PCI-E x8 links the nominal data bandwidth is 2.0 GB/s per-direction (upstream or downstream) so that would be 4.0 GB/s full-duplex. For x4 links nominal data bandwidth would be 1.0 GB/s per direction or 2.0 GB/s for full-duplex. However, there are underlying protocol overheads due to flow control update packets, acknowledgement packets, periodic SKP ordered sets, upstream memory read requests, etc. In addition to the PCI-E protocol overheads, I/O devices are controlled by device drivers in the host OS, and this control imposes additional delays for Perhipheral I/O (PIO) commands from the driver.


Nominal PCI-E BW per lane: 250 MB/s (M=10^6) with 8b10b encoding

(Wirespeed only, assumes *no* PCI-E protocol overhead)

8 lanes, 2 directions => 8*250*2 = 4000 MB/s (M=10^6)

4 lanes, 2 directions => 4*250*2 = 2000 MB/s (M=10^6)

Realistic DMA Performance including PCI-E protocol (but no driver or OS overheads) for a typical fabric.

Operation

x4 Link

x8 Link

DMA Read

700-800 MB/s

1400-1600 MB/s

DMA Write

700-800 MB/s

1400-1600 MB/s

Bi-Directional

1500-1600 MB/s

3000-3200 MB/s

Assuming 128B maximum payload size
Assuming 512B maximum read request size
Assuming typical switch and PCI-E link layer hardware behaviors.