The SPARC Architecture IEEE Milestone Plaque unveiling recognizing the technological achievements of the SPARC RISC Architecture for innovation and excellence will be held on February 13, 2015 at 11:00 a.m. in the lobby of the Clock Tower on Oracle’s Santa Clara Campus. The plaque unveiling will be preceded by a dedication ceremony in the Oracle Auditorium beginning at 10:00 a.m. Speakers will include IEEE 2015 President Howard Michel, John Fowler, Executive Vice President, Systems, Oracle, and Professor David Patterson along with others instrumental in shaping the success of this highly impactful technology.
A History of Record Performance and Mission Critical Enterprise Capabilities
Sun Microsystems first introduced SPARC (Scalable Processor Architecture) RISC (Reduced Instruction-Set Computing) in 1987. Over the course of its life, the SPARC processor architecture has powered millions of servers and workstations, and is still a leading and highly valued technology today.
Closely integrated with the Oracle Solaris operating system, Oracle's SPARC-based systems provide customers extreme performance to maximize the up-time and ROI of mission-critical enterprise applications and cloud services—at a fraction of the cost of mainframe computers. With a long history of record-breaking performance, SPARC-based systems have achieved over 450 record benchmarks, with 32 currently standing. Today, the SPARC processor family is used in Oracle's enterprise servers to create architectures that are optimized for a powerful mix of applications, from CRM systems and Java/Web middleware infrastructure applications to mission-critical ERP and backend OLTP/data warehousing enterprise applications that depend on high availability and scalability.
SPARC Innovations Continue
Building on over 27 years of innovations and a long list of "firsts," Oracle continues to engineer record-breaking SPARC-based systems running Oracle Solaris. As first announced at Hot Chips 2014, Oracle’s new and revolutionary Software in Silicon technology hardwires key software processes directly onto the processor. Software in Silicon accelerates functions running on special engines on the processor's silicon, separate from its cores, and speeds up application performance while retaining the overall functionality of the processor.
To attend the SPARC Architecture IEEE Milestone Plaque unveiling please register here.