SUPerG - Chips and Salsa
By mrbill on Apr 19, 2005
Wow, Marc Tremblay rocks. From a medium to high level of detail, an excellent hour of explaining just \*why\* chip designs are the way they are. Instead of bragging about how cool, small, and fast some chip is, he takes the time to explain how caches work, and how they don't work. His presentation included some great visuals showing cache hit latency measurements, and penalties for cache misses. He then tied that all back to decisions made in SPARC chip design, and showed where the chips meet the code moving forward (nice trending).