HP FUD

In HP's latest bit of FUD they say
Sun has stated that Niagara will be binary compliant with previous SPARC designs  but this fact does not tell the entire story regarding how well a SPARC binary compatible program will run on Niagara.  It's not enough to simply run - the program must also run well to be of actual value.  Significant software optimization may be  required to ensure that software will work well with Sun's Niagara.
As Niagara is not yet a released product, a detailed rebuttal is not yet "kosher". However, HP's warning makes it sound like Niagara is unique in providing a new pipeline; but almost every new generation of SPARC processor has had a new pipeline, and compiler optimizations to exploit them fully. That has seldom meant more than a small amount of work for most developers and it has never meant anything generally disruptive. Why anyone would think that this would be different in this generation requires more foundation than HP has bothered to provide.

That Niagara will support simultaneous execution of many threads is clear from the presentations that HP references. That, as HP claims. that this will require

....To fully exploit Sun's Niagara systems, developers may have to change how applications are architected...  Sun has stated that Niagara changes the minimum application scalability demands from 1-4 threads to 32 concurrent threads...

Strikes me as pretty absurd. My laptop (a PowerBook G4) currently has 295 threads running (according to Apple's accounting). I've often had more than 500. Perhaps the authors of HP's FUD believe that servers customarily run a single instance of a single application (and that is a Best Practice of some sort).  It's not the way I've run most of my computing systems over the years; nor am I likely to start ;>

That HP can use so many words, and so many "bullet points" to say the same thing is a tribute to something.

I think it's also worthy noting that HP's primary CPU technology supplier (with the impending end of the PA family, and the already buried Alpha family; both RIP), is busily crafting large multi-core (which translates into "threads" more or less, in this context) is saying things such as:
So to the extent that HP's contention is correct, that folks should be concerned about making their applications scale to large numbers of hardware threads, it would seem that such tinkering will bear fruit (albeit further in the future) on x64 chips from Intel as well as "Today" with SPARC.

Consolidation (running multiple instances, or different applications) on a single Niagara chip doesn't require any application changes... and any application changes made for Niagara scaling are very likely to stand one in good stead for future x64 chips. So why not go with the future today?
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