Translation Storage Buffers

The translation storage buffer (TSB) is a SPARC-specific data structure used to speed up TLB miss handling in the UltraSPARC family of CPUs. Since these CPUs implement TLB miss handling via a trap mechanism, performance of the low-level trap handling code in the operating system is crucial to overall system performance.

The TSB is implemented in software as a direct-mapped, virtually-indexed, virtually-tagged (VIVT) cache. While its size is a minimum of the processor's page size (8K), its upper bound is practically unlimited. The UltraSPARC CPUs have a translation assist mechanism which, given the base address of the TSB in a register, provides a pre-computed TSB entry pointer corresponding to the virtual address of the translation miss. This mechanism only supports TSBs up to 1M in size, which is where the current software support is capped1.

On a TLB miss trap (%tt = {0x64, 0x68, 0x6C}) the trap handler corresponding to the particular trap code is invoked from the trap table by the CPU. For a ITLB or DTLB miss, the TSB is searched for a valid entry whose tag matches the virtual address of the translation miss. If the entry is found, it is loaded from the TSB into the TLB, and the trapped instruction is retry'd. If the entry is not found, the translation hash tables are searched using the current process address space pointer as well as the virtual address as the hash key.

Prior to Solaris 10, the user process TSBs used to come from a global pool of fixed size which was allocated at boot. In Solaris 10, the Dynamic TSB project made significant changes to all of the SPARC HAT layer, but in particular, changed the implementation so that TSBs are allocated dynamically.


1This is only true for user processes. The kernel itself is a special case, and usually has a larger TSB -- up to 16MB in size. The trap handlers ignore the precomputed pointer on kernel misses, and compute the TSB entry index manually.

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the TSB is searched for a valid entry whose tag matches the virtual address of the translation miss
The linear search of 16MB table sounds pretty expensive for a TLB miss handler. Is this done by zulu_hat_asm.c:zulu_hat_tsb_lookup()?

Posted by nikita on October 17, 2005 at 10:57 PM CDT #

By "search", I mean it is indexed using the TSB entry pointer. This results in only one memory reference. If the entry is there, it is used, if it is not, a TSB miss results and the hash is searched. All of the code is in sfmmu_asm.s.

Posted by Eric Lowe on November 14, 2005 at 03:22 PM CST #

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