OpenSPARC T1 Version 1.4 Released

OpenSPARC T1 v1.4 adds significant new functionality as well as new platform support in its hardware bundle. On the design side, it adds knob to create single core, single thread implementation of the OpenSPARC T1. This, we believe, will be useful in creating multi-core designs that do not include hardware threading. Additionally, it also provides an option to create FPGA implementation from the base design. This FPGA option creates a fully synchronous design with better utilization of on-chip FPGA resources like Block RAMs and Multipliers. And finally, version v1.4 also includes an option to remove Stream Processing Unit (SPU) from the design. Since SPU is essentially an on-chip hardware accelerator for cryptographic functions, one can choose to remove it for more general purpose CPU implementations.

Although three options described above can be chosen independent of each other, combining them will create an FPGA implementation with the smallest possible area foot-print. Needless to say, we have also included verification environment for the new additions and also added, for the first time, elementary support for netlist verification through vector playback.

Together with design enhancements, OpenSPARC T1 v1.4 also supports x86_64 hardware platform.

For more details, please check the "OpenSPARC T1 Processor Design and Verification User's Guide" included under to "doc" directory of the hardware distribution.

Download it now!

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