UltraSPARC T2 benchmarks

I was presenting to a customer this morning and the question of what applications does the UltraSPARC T2 excel at came up. A very similar question came up when I was presenting at CommunityOne, so it's probably something I should talk about.

I do work on benchmarks - I've described before some of the analysis I did for the development of CPU2006 - but I don't get involved in the "marketing" of benchmark results - I spend my time at the disassembly level. So this is a bit of a departure for me.

Anyway the answer the question of "What's a T2 good for?" is basically "Everything". The only exception is that it's not going to be much use for a customer who only wants to run a single copy of a single threaded application "and that is all". But most people want to run a bunch of codes, or multiple copies of the same code, or some multithreaded app. All these are very suitable for the UltraSPARC T2, or UltraSPARC T2+.

In terms of evidence, here's a bunch of benchmarks for the UltraSPARC T2 and the UltraSPARC T2+. And there's also a number of testimonials from customers. In terms of the benchmark numbers I think its important to see that the processor does well on "commercial" workloads, but also does well on SPEC CPU2006 rate, both floating point and integer.

Moving back to a more technical discussion. An UltraSPARC T2 has 8 cores each with a floating point unit. Each core can execute 2 instructions per cycle, or one floating point operation per cycle. Assuming the chip is clocked at 1.4GHz, each chip can execute:

  • 8 cores \* 2 instructions \* 1.4 GHz = 22.4 billion instructions per second
  • or 8 cores \* 1.4 GHz = 11.2 billion FPops per second.

The T5240 puts two of these chips into a single system, so the numbers double. So in terms of raw instruction issue performance the chips are pretty much unbeatable. Of course, the performance of the chip is normally hampered by the memory stall time. But being CMT processors, the stall time gives the opportunity for other threads to execute, so this is not a factor for the T2.

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About

Darryl Gove is a senior engineer in the Solaris Studio team, working on optimising applications and benchmarks for current and future processors. He is also the author of the books:
Multicore Application Programming
Solaris Application Programming
The Developer's Edge

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