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Dan Anderson

Recent Posts by Dan Anderson

SPARC T4 Digest and Crypto Optimizations in Solaris 11.1

In a previous article I mentioned SPARC T4 processor optimizations added to OpenSSL. The SPARC T4 processor supports new instructions to assist AES, RSA, SHA,...

TPM Key Migration in Solaris

TPM Key Migration in Solaris Introduction alt="Infineon TPM 1.2 chip" width="180" height="135" border="0" />Solaris platforms use the TPM 1.2 chip "TPM" stands...

How to tell if SPARC T4+ crypto is being used?

Update 2016: everything here applies to subsequent Oracle SPARC processors since T4, including the SPARC M7/T7 line. Further optimizations and speedups are...

Toorcon14

Toorcon 2012 Information Security Conference San Diego, CA, http://www.toorcon.org/ Dan Anderson, October 2012It's almost Halloween, and we all know what that...

Optimizing Solaris 11 SHA-1 on Intel Processors

SHA-1 is a "hash" or "digest" operation that produces a 160 bit (20 byte) checksum value on arbitrary data, such as a file.It is intended to uniquely identify...

Optimizing AES modes on Solaris for Intel Westmere

Optimizing AES modes on Solaris for Intel Westmere Review AES is a strong method of symmetric (secret-key) encryption.It is a U.S. FIPS-approved cryptographic...

Solaris AESNI OpenSSL Engine for Intel Westmere

Solaris AESNI OpenSSL Engine for Intel Westmere Cryptography is a major component of secure e-commerce.Since cryptography is compute intensive and adds a...

SPARC T4 OpenSSL Engine

SPARC T4 OpenSSL Engine Cryptography is a major component of secure e-commerce.Since cryptography is compute intensive and adds a significant load to...

Sign Sign everywhere a sign

Today our building's sign in San Diego. California was changed from the purple Sun Microsystems sign to the red Oracle sign. However, the name Sun still lives on...