Wednesday Nov 30, 2011

Optimizing Solaris 11 SHA-1 on Intel Processors

SHA-1 is optimized on Solaris x86 using an interesting combination of Intel SSSE3 instructions, 128-bit %xmm registers, and vectorizing 16 rounds of SHA-1 in parallel.[Read More]

Tuesday Nov 15, 2011

Optimizing AES modes on Solaris for Intel Westmere

Solaris 11 for x86 optimizes AES-CTR, AES-CBC, and AES-ECB modes with an innovative mixture of using 128-bit %xmm registers, AESNI instructions, processing AES and mode operations at the same time, and interleaving 4 AES blocks at a time. As a result is higher performance over using AESNI alone as a separate operation.[Read More]

Wednesday Nov 09, 2011

SPARC T4 OpenSSL Engine

The new SPARC T4 processor adds several built-in instructions for cryptography, including AES. The new OpenSSL T4 engine on Solaris 11 takes advantage of these new T4 AES instructions. The result is higher performance AES operations when running OpenSSL. [Read More]
About

Solaris cryptography and optimization.

Search

Archives
« April 2014
SunMonTueWedThuFriSat
  
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
   
       
Today